In a general active-matrix liquid crystal display device including a liquid crystal panel with a display area, the liquid crystal panel consists of two substrates with a liquid crystal layer provided therebetween, one of the two substrates has a plurality of data lines, which serve as video signal lines, and a plurality of gate lines, which serve as scanning signal lines, arranged in a matrix, and the substrate also has a plurality of pixel forming portions arranged in a matrix so as to correspond to intersections of the data lines and the gate lines. The pixel forming portions are components for providing image display on the liquid crystal panel, and each of them includes a TFT (thin-film transistor), which is a switching element with a gate terminal connected to the gate line and a source terminal connected to the data line, and also includes a pixel electrode and an auxiliary capacitor connected to a drain terminal of the TFT. The other of the two substrates has a common electrode provided thereon, and a voltage to be applied to the liquid crystal has a value corresponding to a difference between a voltage supplied to the common electrode and a voltage supplied to the pixel electrode, so that display is provided in accordance with the voltage value.
Such an active-matrix liquid crystal display device has a data driver for driving the data lines of the liquid crystal panel, a gate driver for driving the gate lines, a common electrode driver circuit for driving the common electrode, and a display control circuit for controlling the data driver, the gate driver, and the common electrode driver circuit. Note that the gate driver, the data driver, and other circuits can be formed on the glass substrate by, for example, an LTPS process using low-temperature polysilicon (abbreviated below as “LIPS”), or they can be mounted on a glass substrate by COG (chip-on-glass) technology, or provided outside a glass substrate, as a semiconductor device with all or part of the above circuits being integrated on a semiconductor substrate (such a device will be simply referred to below as an “IC”).
Here, with recent advancement in high display image resolution on display devices, the number of signal lines per unit length has increased significantly, for example, in display devices, such as active-matrix liquid crystal display devices, which require signal lines (data lines or gate lines) whose number corresponds to the resolution of images to be displayed. As a result, the driver circuit that applies signals to the signal lines has an extremely narrow pitch of connections (referred to below as “connection pitch”) of output terminals of the driver circuit and the signal lines of the display panel. Such a tendency toward a narrow connection pitch as accompanied by advancement in high display image resolution is particularly noticeable at connections of video signal lines and a driver circuit therefor (data driver) in a color display device, such as a color liquid crystal display device, in which a unit of display consists of three adjacent pixels, R (red), G (green), and B (blue).
In a conventional liquid crystal display device proposed to overcome such an issue, the video signal lines are divided into groups of two or more (e.g., three video signal lines corresponding to three adjacent pixels, R, G, and B), and one output terminal of the video signal line driver circuit is assigned per group of video signal lines such that video signals are applied through all output terminals to the groups of video signal lines in a time-division manner during one horizontal scanning period for image display.
In the liquid crystal display device employing a mode of driving video signal lines in a time-division manner as described above, the time period for which to charge each video signal line is shortened in accordance with the number of video signal lines in each group, i.e., the number of time divisions by change-over switches, and where the number of time divisions is d, the time period for which to charge each video signal line is 1/d or less than 1/d of that for a regular liquid crystal display device, which does not employ the mode of driving video signal lines in a time-division manner. However, by forming change-over switches with the number of time divisions d on a substrate of a liquid crystal panel, the connection pitch of output terminals of a video signal line driver circuit and the video signal lines can be d-fold of that in a regular liquid crystal display device. Moreover, with such a configuration, the number of chips can be reduced where a video signal line driver circuit consisting of a plurality of integrated circuit chips (IC chips) is used for driving one liquid crystal panel. The advantage of such a video-signal-line time-division drive mode is widely known, and therefore, the video signal lines are often divided into groups of three that transmit video signals to three adjacent pixels, R (red), G (green), and B (blue).
In this manner, in the liquid crystal display device employing the video-signal-line time-division drive mode, the time period for which to charge each video signal line is 1/d or less than 1/d of that for a regular liquid crystal display device. Therefore, control signals (control pulses) to be provided to the change-over switches preferably have as little waveform rounding as possible, so that the change-over switches are reliably kept on for a time period required for charging. As waveform rounding increases, more time is taken until an on-state potential for turning on the change-over switch is reached, resulting in a shorter period of time for which the change-over switch is kept on.
In this regard, Japanese Laid-Open Patent Publication No. 2004-271729 discloses a display device in which change-over switches are arranged with respect to control signal lines for transmitting control signals, such that distances between adjacent change-over switches and their respective control signal input terminals are approximately equal, whereby the control signals provided to the change-over switches have approximately the same degree of waveform rounding, and further, the control signals are inputted to the control signal lines from both ends, thereby reducing waveform rounding of the control signals. Such a configuration reduces uneven display due to waveform rounding.